Partha P Chakrabarti
Dept. of Comp. Sc. & Engg., IIT Kharagpur, India.
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CURRENT ONGOING PROJECTS

Click on the Project Title to see the Details.

Project

Sponsored by

1

IIT Foundation and five industries including National Semiconductor Corp, Sun Microsystems, Cadence Design, Synopsys Inc and Agilent Technologies.

  2

Netlist Database for Hard Macro Characterization

National Semiconductor Corp, USA

  3

Model Abstraction and Formal Verification

Sun Microsystems, USA

4

Reasoning About Digital Circuits: An AI Algorithms Approach to CAD Tools for VLSI

Dept of Sc & Tech., Govt. of India under the Swarnajayanti Fellowship

5

Verification in Virtual Silicon

Virtio Corp, USA

6

Development Tools for CR-16 and CR-XT

National Semiconductor Corp, USA

7

Computers in Schools

Joint efforts of School of IT and Dept of CSE at IIT Kharagpur in collaborations with a number of industries like HCL.

8

Temporal Verification using VERA

Synopsys Inc, USA
9
Tools for Coverage Analysis and High-Level Specification and Verification Intel Corp, USA

 

Advanced VLSI Design Laboratory:(Sponsored by IIT Foundation and supported by five leading industries. National Semiconductor Corporation provides free fabrication facilities). For VLSI lab. website Click Here

This laboratory aims at research and training in Analog Design, Digital VLSI Design, Testing and CAD. Presently the laboratory has facilities for taping out chips ate 0.18u and 0.25u CMOS. Students and faculty have already completed several innovative designs. The lab has taken up several projects in design including DC-DC Converters (National Semiconductors), Oscillators, encryption circuits, 3G communication components etc.

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Netlist Database for Hard Macro Characterization: (Sponsored by National Semiconductor Corp, USA).

This project aims at developing a high-speed multi-model netlist database to store designs at various levels of abstraction and reason about them. An initial version has already been published jointly by IIT Kharagpur and National Semiconductors and is available from Bijoy Chatterjee (bijoy@nsc.com) or P. P. Chakrabarti (ppchak@cse.iitkgp.ernet.in).

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Model Abstraction and Formal Verification: (Sponsored by Sun Microsystems, USA).

This project aims at developing new algorithms for formal verification of sequential circuits. These include fast Model Checking methods for timed models.

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Reasoning About Digital Circuits: An AI Algorithms Approach to CAD Tools for VLSI: (Sponsored by Dept of Sc & Tech., Govt. of India under the Swarnajayanti Fellowship).

This project aims at developing the fundamental theoretical basis for formal verification. The work includes abstraction, equivalence checking, model checking and design estimation.

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Verification in Virtual Silicon: (Sponsored by Virtio Corp, USA).

This work aims at developing high-level tools for rapid prototyping, high-level verification using a combination of simulation and formal verification and conversion to executable specifications like SystemC..(Please see www.virtio.com ).

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Development Tools for CR-16 and CR-XT: (Sponsored by National Semiconductor Corp, USA).

Aims at producing CAD tools for processor design and related software tools. These include simulators, assemblers, debuggers, compilers and design estimators. The research work also includes design of automated generation of these software tools for extensible architectures.

For Project Web Page CLICK HERE

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Computers in Schools:

This Mission project initiated by the joint efforts of School of IT and Dept of CSE at IIT Kharagpur in collaborations with a number of industries like HCL, and partner schools aims at developing low cost of ownership computing facilities for Indian schools. This includes development of application and systems software and subsequently hardware to be able to enhance the capability of less affluent school children and improve their academic performance. The technical activities include development of necessary Thin-Client and Server OS based on Free BSD, application tools for learning and communication and teacher interaction, specialized web access on low speed, intermittently accessible Internet and vernacular language translation.

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Temporal Verification using VERA: (Project initiated with Synopsys Inc, USA).

 

Tools for Coverage Analysis and High-Level Specification and Verification: (Project initiated with Intel Corp, USA).

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